By Yi-Ping Hung (auth.), Domingo Mery, Luis Rueda (eds.)
These court cases are a manifestation of the wonderful scienti?c contributions offered on the moment IEEE Paci?c Rim Symposium on Video and photo know-how (PSIVT 2007), held in Santiago, Chile, in the course of December 17–19, 2007. The symposium supplied a discussion board for proposing and exploring the l- est examine and advancements in photo and video know-how. Discussing the probabilities and instructions in those ?elds settled a spot the place either educational study and business actions have been provided for mutual bene?t. the purpose of the symposium was once to advertise and disseminate ongoing examine on multi- dia and photograph sensor applied sciences, photos and visualization, photo research, a number of view imaging and processing, machine imaginative and prescient functions, photograph and video coding, and multimedia processing. the quantity is a attention of the continued good fortune of the Paci?c Rim Symposium on Video and picture Te- nology for which the ?rst factor (PSIVT 2006) used to be final 12 months in Hsinchu, Taiwan, Republic of China. PSIVT 2007 offers proof of the growing to be stature of the Paci?c Rim s- enti?c group in video and photo expertise andof their effect all over the world. The symposium bought contributions from 31 international locations, registering a complete of a hundred and fifty five papers, out of which seventy five have been authorised for ebook in those proce- ings, that is resembling an recognition cost of forty eight. 4%. The assessment procedure was once performed in seven di?erent topics, every one composed of topic Co-chairs and a ProgramCommittee composed of across the world well-known scientists, all specialists of their respective topic. each one paper was once peer-reviewed via to ?ve reviewers.
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Extra info for Advances in Image and Video Technology: Second Pacific Rim Symposium, PSIVT 2007 Santiago, Chile, December 17-19, 2007 Proceedings
Mery and L. ): PSIVT 2007, LNCS 4872, pp. 36 – 47, 2007. © Springer-Verlag Berlin Heidelberg 2007 High Throughput Hardware Architecture for Motion Estimation 37 Fig. 1. Block diagram of a modern video coder Motion estimation (ME) operation tries to reduce the temporal redundancy between neighboring frames . One or more frames that were already processed are used as reference frames. The current frame and the reference frame are divided in blocks to allow the motion estimation. The idea is to replace each block of the current frame with one block of the reference frame, reducing the temporal redundancy.
Mery and L. ): PSIVT 2007, LNCS 4872, pp. 24 – 35, 2007. 264/AVC 25 In this work, a general purpose processor was used together with a specific designed accelerator hardware to meet the embedded motion compensation requirements. The processor used was the MIPS Plasma processor, and the two-dimensional FIR filter was designed as the accelerator hardware. Then a satisfactory real time performance was obtained for the motion compensation process. As the operation frequency of Plasma is relatively low (74MHz), the energy consumption of this solution could be lower than that obtained through the design of the complete motion compensation in hardware.
The presented architecture was specifically designed to reach real time when processing standard definition television frames (720x480 pixels). Section 2 of this paper presents the 4:1 Pel Subsampling search algorithm and the SAD criterion. Section 3 presents a software evaluation of the search algorithms used. 38 M. Porto et al. Section 4 presents the designed architecture, detailing its main modules. Section 5 presents the designed architecture for SAD calculation. Section 6 presents the synthesis results and comparison with related works.